1. Technical Field
The present invention relates in general to data processing systems and in particular to data processing systems utilizing a Serial Storage Architecture ("SSA"). Still more particularly, the present invention relates to maximizing simultaneous reads and writes utilizing intelligent routing through the Serial Storage Architecture adapter ports.
2. Description of the Related Art
Serial Storage Architecture (SSA) is a serial form of Small Computer System Interface ("SCSI") and is an American National Standards Institute ("ANSI") standard interface used to link multiple storage devices (storage subsystem) to a host data processing system. Communications (I/O process) between the host data processing system and the storage subsystem occur between an initiator device (host) and a target device (generally a storage device). An I/O process is a method of accomplishing a communications task with an input/output device and usually involves multiple steps.
A typical host connection, involving SSA, utilizes an adapter/interface with two bi-directional ports connected serially to a string of target storage devices forming a bi-directional loop with one end at each port. SSA loops are full-duplex and allow simultaneous two-way (bi-directional) I/O communications, which permits more than one I/O process at a time.
Each target storage device connected to the SSA bi-directional loop has its own buffer in which any data frame ("frame") that passes through the target storage device port is buffered. As a frame is received on the inbound side of a port, the receiving port assesses whether or not the frame is addressed to the target storage device. If the frame is not addressed to the target storage device, the receiving port can either begin to send the frame to the outbound port or, if the receiving port has proper authority, the receiving port may hold on to the incoming frame, transmit the outbound port's frame and pass the received frame afterward. At a given point in time each port may or may not have part or all of a frame or frames buffered and there may be multiple frames travelling through a target storage device port simultaneously.
The data traffic through the adapter/interface is analogous to a continuous circular subway system. The cars are always moving through the tunnel (loop), whether there is any payload or not. As long as there is an empty spot on the train to place a frame, a frame may be inserted into that spot. In order to maximize the throughput of the interface, all the cars on the train should be filled with data frames. To complete the analogy, as SSA is a bi-directional interface, there are two trains within the continuous circular subway system, one traveling in each direction.
The concept of having multiple frames traveling through the interface at a particular time, hence sharing the I/O interface by multiple, simultaneous processes, is called "spatial reuse." In order to maximize the system performance, the traffic, or flow of data frames, needs to be balanced so that all "space" is filled with data frames in both directions through a loop. An architectural limitation of SSA, created by the method of addressing, requires a target storage device to return datand status to an initiator device utilizing the same port from which the command was received.
However, each target storage device within the storage subsystem may be accessed from either host system adapter/interface bi-directional port. When the storage subsystem is initialized, an initiator device in the loop builds a configuration table detailing available paths to each device. Typically, after accessing the table, the initiator device will access each device through the adapter by a shortest available path and use a secondary, or longer path, only in the event of a loss of connection in the primary path. This provides a simple means of routing I/O communications, but does nothing to balance the reads and writes through the adapter port.
In known implementations, the adapter accesses devices via the shortest path available. Adapters utilize alternate paths (i.e., the opposite direction in the loop) only in the event of a loss of connection. Maximizing the number of simultaneous reads and writes is difficult when there is only one port and a few devices. As the number of adapter ports and target devices in the loop increases, the opportunities for simultaneous reads and writes also increase.
Limitations on the I/O process which are required by known configurations of data processing systems utilizing a SSA subsystem restrict the capability of the SSArchitecture. A prior art example, illustrated in FIG. 5, depicts a high level logic flow diagram of the prior art I/O process between an initiator device and a target storage device, utilizing a Serial Storage Architecture (SSA) subsystem. The process begins with step 500, which illustrates the beginning of the I/O process between an initiator device and a target storage device. The process then proceeds to step 502, which depicts a determination of whether or not the shorter, or primary, path to the target storage device is available. If the primary path is not available, the adapter returns to step 502 until the primary path becomes available. If the primary path is available, the process passes instead to step 504, which depicts communication between the initiator device and the target storage device. The process continues to step 506, which illustrates a determination of whether or not the I/O process is complete. If not, the process then returns to step 502 and repeats steps 502 through 506 until the I/O process is complete.
Referring again to step 506, if the I/O process is complete, the process proceeds to step 508, which depicts transmittal of a complete signal and a receive status to the initiator device by the target storage device. The process then proceeds to step 510, which illustrates an I/O process end signal transmitted to the initiator device by the target storage device.
As illustrated in FIG. 5, once an I/O process is started in the shorter of two paths, the adapter is committed to the same path for all frames in the I/O process. Adapters are limited to accessing devices, with a complete command/data I/O process, in the shorter of two paths and only utilize an alternate path (opposite direction in the loop) in the event of the loss of a connection.
It would be desirable, therefore, to provide a method of intelligent routing that would utilize the shorter path to a target storage device, if available, or utilize an alternate path if the shorter path is not available. Also, it would be desirable to utilize Out of Order Transfers to maximize the number of simultaneous reads and writes through an adapter in a data processing system utilizing SSA.